Scholarship
Submit your application before 29th October for Niš; 31st October for Belgrade and 27th November for Novi Sad
The final list of selected candidates will be announced two weeks after the relevant deadline.
Scholarship
Submit your application before 29th October for Niš;
31st October for Belgrade and 27th November for Novi Sad
31st October for Belgrade and 27th November for Novi Sad
The final list of selected candidates will be announced two weeks after the relevant deadline.
Consider this: your graduate thesis and training on a scholarship project – completed at the same time!
The list of subjects is approved by professors, and we also offer a scholarship without additional contractual obligations. This is the opportunity to start working in a global company with the seat in Belgrade and Novi Sad while completing obligations at the faculty.
Elsys Eastern Europe has established many years, of cooperation with the University of Belgrade and University of Novi Sad. We offer you a mentoring program, consulting and opportunity for practice by participating in a real project.
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It is time to put theory into practice at the place where your ideas and knowledge are valued. If you already are one of the best students, why waste time? This two-in-one offer is made for outstanding students of the final year who desire and can do more. Scholarship programs eligible for students from Faculty of Engineering in Belgrade, Faculty of Technical Sciences in Novi Sad and Faculty of Electronic Engineering in Nis, are in duration of 10 months, meaning that the best students chosen for the program will receive Elsys Eastern Europe scholarship in the amount of 20.000 RSD on monthly base.
In those 10 months, students have the obligation to participate in one of our available trainings by their choice. For students from Faculties in Belgrade and Novi Sad, training can be part-time in duration of 1 to 6 months, depending on a chosen training program and in agreement with students or it can be full-time during our annual summer internship. For students from the Faculty in Nis, training is held only as a part of our annual summer internship.
In those 10 months, students have the obligation to participate in one of our available trainings by their choice. For students from Faculties in Belgrade and Novi Sad, training can be part-time in duration of 1 to 6 months, depending on a chosen training program and in agreement with students or it can be full-time during our annual summer internship. For students from the Faculty in Nis, training is held only as a part of our annual summer internship.
Eligible Faculties
Faculty of Electrical Engineering in Belgrade
Electrical Engineering and Computer
Engineering Department
Electronics Department
Faculty of Technical Sciences in Novi Sad
E1 – Embedded systems and algorithms
E1 – Microelectronics
Faculty of Electronic Engineering in Niš
Electronic circuits and Embedded Systems (EKES)
Microelectronics
* If your faculty is not on the list, however, you feel that you poses the right skills and knowledge as fellow students from the mentioned above programs please contact us by sending an email on contact@elsys-eastern.com
Scholarship Benefits
SCHOLARSHIPPROJECT
This is the opportunity to improve your skills in the field of digital, analog and mixed-signal integrated circuits in the company Elsys Eastern Europe.
Office
or REMOTE
Health is priority number one; therefore, our program can be remote with respect to office work time, or it can be held in our office. It is completely optional and as agreed with the candidate.
WORKTIME
Our scholarship program can be performed part-time as agreed with each candidate individually. We strongly believe in work and life balance and its importance for overall success.
PAID
SCHOLARSHIP
The knowledge and firsthand experience you will get out of your scholarship is priceless. However, we will still provide you with additional financial support during your scholarship program in amount of RSD 20,000 monthly.
EXPERIENCED
MENTOR
You will receive training from the most experienced engineers in the region to help you become an engineer ready to work on commercial projects.
2 in 1
The project you are working on can be the topic of the graduate, master thesis or seminar paper. Check out the list of:
No lock-in contract obligation
We are looking for a true match among our scholars. Someone that clicks with us, and we click with them perfectly. That’s why we don’t bind you with lock-in-contracts. It’s a true scholarship.
Project examples
IC LAYOUT Project
• Analog IC Layout methodologies and flow basic
• CAD Tools Basics
• Introduction to 55nm CMOS Process technology
• Introduction to Linux Environment
• CAD Tools Basics
• Introduction to 55nm CMOS Process technology
• Introduction to Linux Environment
• Starting Analog design topologies layout training
• Working on layout of 1-2 modules
• Working on layout of 1-2 modules
• Introduction to more advanced IC Layout topics
• Introduction to more complex circuits and complex hierarchy and requirements
• Working on layout and physical verification of 2-3 complex modules
• Introduction to more complex circuits and complex hierarchy and requirements
• Working on layout and physical verification of 2-3 complex modules
• Analog IC Layout methodologies and flow basic
• CAD Tools Basics
• Introduction to 55nm CMOS Process technology
• Introduction to Linux Environment
• CAD Tools Basics
• Introduction to 55nm CMOS Process technology
• Introduction to Linux Environment
• Starting Analog design topologies layout training
• Working on layout of 1-2 modules
• Working on layout of 1-2 modules
• Introduction to more advanced IC Layout topics
• Introduction to more complex circuits and complex hierarchy and requirements
• Working on layout and physical verification of 2-3 complex modules
• Introduction to more complex circuits and complex hierarchy and requirements
• Working on layout and physical verification of 2-3 complex modules
AMS Project
Analog modeling and Verilog AMS
System Verilog and UVM training
Model integration into UVM environment
Analog modeling and Verilog AMS
System Verilog and UVM training
Model integration into UVM environment
Digital PROJECT – Belgrade, Niš
Lectures + Lab practices
Project executiron – Digital Design
Lectures + Lab pracitces
UVM & System Verilog
UVM & System Verilog
Project execution – Digital Verification
Lectures + Lab practices
Project executiron – Digital Design
Project executiron – Digital Design
Lab pracitces UVM &
System Verilog
System Verilog
Project execution – Digital Verification
Digital PROJECT – Novi Sad
Digital Basic training
FPGA Lab practice
Big Project Execution
Digital Basic training
FPGA Lab practice
Big Project Execution
SV & UVM Training
Scholarship Requirements
Students of the Faculty of Electrical Engineering in Belgrade, Faculty of Technical Sciences in Novi Sad or the Faculty of Electronic Engineering in Niš who have sucesfully enrolled the fourth year of studies and are listening seventh semester are eligible to apply.
No other scholarship approved by another company in the same period.
No other scholarship approved by another company in the same period.
Required documents
CV, Written In English
Cover letter
Certificate on passed exams
Proposal of idea/project you would like to work on (optional)
The button you are searching for
is right here
Submit your application before 29th October for Niš;
31st October for Belgrade and 27th November for Novi Sad
Areas of expertise
By enrolling into Elsys Eastern Europe scholarship program you will be able to get a real sense of how it is to work in our cutting-edge profession and learn in-depth technical details about the area of expertise you pursuit your career in. All while being supported by experienced mentor in charge for your professional growth.
