Consider this: your graduate thesis and training on a scholarship project – completed at the same time!
The list of subjects is approved by professors, and we also offer a scholarship without additional contractual obligations. This is the opportunity to start working in a global company with the seat in Belgrade and Novi Sad while completing obligations at the faculty.
Elsys Eastern Europe has established many years, of cooperation with the University of Belgrade and University of Novi Sad. We offer you a mentoring program, consulting and opportunity for practice by participating in a real project.
This is the opportunity to improve your skills in the field of digital, analog and mixed-signal integrated circuits in the company Elsys Eastern Europe.
The knowledge and firsthand experience you will get out of your scholarship is priceless. However, we will still provide you with additional financial support during your scholarship program in amount of RSD 20,000 monthly.
You will receive training from the most experienced engineers in the region to help you become an engineer ready to work on commercial projects.
The project you are working on can be the topic of the graduate, master thesis or seminar paper. Check out the list of:
|1||Clock domain crossing – issues and how to overcome them||DD|
|2||Scheduling techniques and their implementation for queue servicing||DD|
|3||Functional safety approaches implementation in digital design||DD|
|4||Temperature sensor IP – Analysis, modeling and verification||AMS|
|5||Bandgap reference IP – Analysis, modeling and verification||AMS|
|6||Voltage regulator IP – Analysis, modeling and verification||AMS|
|7||Internal oscillator IP – Analysis, modeling and verification||AMS|
|8||Power-on Reset IP – Analysis, modeling and verification||AMS|
|9||IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDP||DV|
|10||IP verification – MAC merge sublayer IP – MMSL – MAC Rx||DV|
|11||IP verification – MAC merge sublayer IP – MMSL – MAC Tx||DV|
|12||SoC integration – 3PIAS Projekat||DD+DV|
|13||SoC integration – ARM – Cortex M0 platform Integration using ARM SDK||DD+DV|
|14||SoC integration – ARM – Cortex M3 platform Integration using ARM SDK||DD+DV|
|15||SoC Verification – interdisciplinary themes – SW coverage collection and analysis||DV|
|16||SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)||DV|
|17||VIP Development – PCI Express||DV|
|18||VIP Development – DDR||DV|
|19||VIP Development – Ethernet||DV|
|20||VIP Development – USB||DV|
|21||VIP Development – CSI||DV|
|22||VIP Development – DSI||DV|
|23||VIP Development – UNIPRO||DV|
|24||VIP Development – I3C||DV|
|25||VIP Development – SLIMbus||DV|
|26||VIP Development – HDMI||DV|