Working closely with many customers our engineers are fully able to integrate into customer’s HW System design and verification teams or take full ownership of a HW Design project.

Our expertise covers:

HW System design:

  • High speed digital electronics including μController, processor, DSP and FPGA architectures
  • Analog electronics
  • RF electronics
  • Power electronics


HW Verification/validation

  • HW Verification
  • Post-silicon characterization/validation


Scope of work covered by our teams:

Project management and planning area

  • Project management by using PMI methodology/waterfall
  • Project management using Agile methodology



  • Fully requirements driven development process from requirements capture phase to HW verification/validation phase
  • Requirements traceability during whole development lifecycle
  • Analysis of complex tasks, development of solution concepts and creation of product specifications
  • Specification and creation of schematic designs according to international regulations
  • Evaluation of new circuit concepts and components using computational tools and simulation tools
  • Development and commissioning of PCBAs
  • PCB layout design using different tools like:
      • Cadence Allegro,
      • Cadence OrCAD and
      • Altium Designer
  • Signal integrity verification using Cadence Sigrity
  • Development, evaluation and implementation of EMC concepts in compliance with EMC guidelines for robust design
  • EMC testing (both pre-compliance and compliance)
  • Circuit design and product design considering FMEDA and FMEA analysis
  • Support the Embedded Software development team in requirements and specifications
  • FPGA development and verification


HW Verification area

  • Support/execute product verification by defining/design/execute verification tests and assessing test results
  • Create test criteria and test specifications for validation and production
  • Post-silicon validation
  • Post-silicon characterization


Documentation area

  • Create product-relevant development and production documentation


Our teams gained experiance in the following technology fields:

  • ARM architectures (Cortex M3, M4, A8, A53, R5, …)
  • Memories (SRAM, DDR3, DDR3L, DDR4, LPDDR4)
  • Networking (Ethernet, TSN, Ethernet real time like EtherCAT, Ethernet Powerlink, SERCOS, …)
  • Automotive (Single-pair Ethernet)
  • FPGAs (Spartan-2, Spartan-3E, Spartan-6 and Spartan-7, Artix-7, Zynq, Zynq UltraScale+, …)
  • GaN and SiC


Products we developed and verified for different industries:

  • Industrial automation (HW Design and verification)
  • Automotive (HW Design and verification)
  • Silicon (Post-silicon Validation/characterisation)
  • Consumer


Fully equiped verification Lab with:

  • Power supplies (including 4-quadrant),
  • Multimeters (bench-top and hand held),
  • Arbitrary waveform generators,
  • Signal generators,
  • Oscilloscopes (real time and MSO),
  •  Logic analyzers
  • Spectrum analyzers,
  • Thermal chambers,
  • Protocol testers (Ethernet 10/100/1000 copper and optical),
  • Reworking tools (soldering stations), microscopes, cameras, thermal imaging cameras,
  • Debugging tools and cables (Xilinx Platform cable USB, TI XDS debuggers, JTAG controllers, …)
Analog and mixed-signal IC layout is one of the rare steps in semiconductor design and manufacturing process that is still done under complete supervision of layout design engineer. Since formal verification and quality-checking tools are still not fully developed, implementing the best methodologies suited for the analog circuit and bringing fabricated and simulated performance of the circuits as close as possible for the given technology process is a daily challenge for IC layout engineer.

Dragan Stančić
IC layout Domain Lead


1Clock domain crossing – issues and how to overcome themDD
2Scheduling techniques and their implementation for queue servicingDD
3Functional safety approaches implementation  in digital designDD
4Temperature sensor IP – Analysis, modeling and verificationAMS
5Bandgap reference IP – Analysis, modeling and verificationAMS
6Voltage regulator IP – Analysis, modeling and verificationAMS
7Internal oscillator IP – Analysis, modeling and verificationAMS
8Power-on Reset IP – Analysis, modeling and verificationAMS
9IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDPDV
10IP verification – MAC merge sublayer IP – MMSL – MAC RxDV
11IP verification – MAC merge sublayer IP – MMSL – MAC TxDV
12SoC integration – 3PIAS ProjekatDD+DV
13SoC integration – ARM – Cortex M0 platform Integration using ARM SDKDD+DV
14SoC integration – ARM – Cortex M3 platform Integration using ARM SDKDD+DV
15SoC Verification – interdisciplinary themes – SW coverage collection and analysisDV
16SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)DV
17VIP Development – PCI ExpressDV
18VIP Development – DDRDV
19VIP Development – EthernetDV
20VIP Development – USBDV
21VIP Development – CSIDV
22VIP Development – DSIDV
23VIP Development – UNIPRODV
24VIP Development – I3CDV
25VIP Development – SLIMbusDV
26VIP Development – HDMIDV
Please note, although thesis are created in collaboration with professors, you need to get final approval by your UNI professor.