Milos will introduce you to IC Layout Engineering and how you can start your career in this area of expertise.
Analog & Mixed Signal expertise is a young and modern expertise, that requires a fresh mindset.
Allow Nikola Miljkovic, a Digital Design engineer at ELSYS Eastern Europe to give you a behind-the-scenes tour of this interesting expertise field.
Sofija, a junior design verification engineer, shares with us her story of a successful career start, as well as industry and work opportunities in the field of digital design verification.
The ADVANS Group announces the opening of its third design center in Serbia, in Niš, as part of the strengthening of its partnerships with several key account customers. The ADVANS Group now has twelve locations, 8 in France, 3 in Serbia and 1 in the USA.
I have the opportunity to meet and collaborate with top engineers, in an extremely pleasant working environment, and in a company that works on serious projects, and at the same time, it facilitates both the professional and personal development of each employee.
As I was growing up, I was becoming more and more independent in terms of opening all kinds of systems, it didn't matter to me whether it was an engine, an electrical device or something else.
When the job offer arrived, I didn't hesitate, the good atmosphere in the company as well as the job I liked, influenced me to continue working in the company.
Today I work as a digital designer, and I face quite challenging things that are current in the modern world of digitization.
We want to help students become great engineers and equip them with valuable knowledge that’s going to serve as a great base for their future development.


1Clock domain crossing – issues and how to overcome themDD
2Scheduling techniques and their implementation for queue servicingDD
3Functional safety approaches implementation  in digital designDD
4Temperature sensor IP – Analysis, modeling and verificationAMS
5Bandgap reference IP – Analysis, modeling and verificationAMS
6Voltage regulator IP – Analysis, modeling and verificationAMS
7Internal oscillator IP – Analysis, modeling and verificationAMS
8Power-on Reset IP – Analysis, modeling and verificationAMS
9IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDPDV
10IP verification – MAC merge sublayer IP – MMSL – MAC RxDV
11IP verification – MAC merge sublayer IP – MMSL – MAC TxDV
12SoC integration – 3PIAS ProjekatDD+DV
13SoC integration – ARM – Cortex M0 platform Integration using ARM SDKDD+DV
14SoC integration – ARM – Cortex M3 platform Integration using ARM SDKDD+DV
15SoC Verification – interdisciplinary themes – SW coverage collection and analysisDV
16SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)DV
17VIP Development – PCI ExpressDV
18VIP Development – DDRDV
19VIP Development – EthernetDV
20VIP Development – USBDV
21VIP Development – CSIDV
22VIP Development – DSIDV
23VIP Development – UNIPRODV
24VIP Development – I3CDV
25VIP Development – SLIMbusDV
26VIP Development – HDMIDV
Please note, although thesis are created in collaboration with professors, you need to get final approval by your UNI professor.