RTI Open Day 12th December 14:30h Belgrade
Open Day 21st December 13h Nis
Reserve your spot on -time, seats are limited. Looking forward to seeing you

Winning The Future

The decision to join a big engineering company in semiconductor industry isn’t an easy one so why not take a tour first? You’ll learn about different areas of expertise, semiconductor industry trends and have the opportunity to catch a glimpse of corporate culture as well as working standards required to work with top-notch semiconductor players.

Learn & Graduate ​

Before you start earning & learning like a professional, you need to decide what field of expertise you want to focus on and probably finish your master thesis. During the Open Day, our senior engineers will share valuable advice on what your first steps should be and how to finish your master thesis during your internship at Elsys Eastern Europe.

Choice Your Expertise

Learned the theory for years and now when you have to pick the right expertise and the right company, you might require some additional information. Our talented engineers will give you an in-depth view at some of the most promising aspects in the future of hardware engineering. You will also get a chance to see what’s it really like working with us as our junior engineers describe profile of some of the most interesting projects they are working on.

Jakša - Digital Design engineer

Since in high school I was mostly interested only in music and film, natural sciences are something that always managed to sneak into my free time simultaneously and provide a lot of answers to questions that are specifically connected to music and film.

Over time, things became more and more digitalized, so my interest in that direction grew more and more. At the Faculty of Electrical Engineering, the Department of Electronics, it was all studied in detail, but in the sea of all fields and areas of electronics that were being studied, I had the impression that I would not know exactly what I wanted to do.

Everything was ravishingly interesting, and everything was rigidly complicated. But I always thought about the sentence of one of the assistants in the first year “You will learn many subjects and many areas, but wait until the fourth year, then you will see the bigger picture of everything and your eyes will be opened to everything you have learned before”.

It was exactly like that. In the fourth year, I learned a lot of applicable things, but the subject Introduction to designing digital VLSI systems caught my attention. There I learned the basics of designing digital integrated circuits and integration on FPGA platforms.

There are a lot of interesting projects, making games, image processing, data manipulation and all that at a highly functional level and with absolute potential to be applied today. Since I wanted to deepen my knowledge in this area even more, I researched where I could do an internship in this area and thus applied to the internship program at Elsys, where I became even more convinced that this is what I want to do.

Today I work as a digital designer, and I face quite challenging things that are current in the modern world of digitization. Sometimes it can be seemingly unsolvable, but that feeling when all the pieces come together and the whole design works – priceless! It is simply unimaginable that a day goes by without me learning something new and pushing the boundaries in my career development ever so slightly.

Happy to see you soon!

Reserve your spot for Open Day

Belgrade Office

Niš Office

Novi Sad Office


1Clock domain crossing – issues and how to overcome themDD
2Scheduling techniques and their implementation for queue servicingDD
3Functional safety approaches implementation  in digital designDD
4Temperature sensor IP – Analysis, modeling and verificationAMS
5Bandgap reference IP – Analysis, modeling and verificationAMS
6Voltage regulator IP – Analysis, modeling and verificationAMS
7Internal oscillator IP – Analysis, modeling and verificationAMS
8Power-on Reset IP – Analysis, modeling and verificationAMS
9IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDPDV
10IP verification – MAC merge sublayer IP – MMSL – MAC RxDV
11IP verification – MAC merge sublayer IP – MMSL – MAC TxDV
12SoC integration – 3PIAS ProjekatDD+DV
13SoC integration – ARM – Cortex M0 platform Integration using ARM SDKDD+DV
14SoC integration – ARM – Cortex M3 platform Integration using ARM SDKDD+DV
15SoC Verification – interdisciplinary themes – SW coverage collection and analysisDV
16SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)DV
17VIP Development – PCI ExpressDV
18VIP Development – DDRDV
19VIP Development – EthernetDV
20VIP Development – USBDV
21VIP Development – CSIDV
22VIP Development – DSIDV
23VIP Development – UNIPRODV
24VIP Development – I3CDV
25VIP Development – SLIMbusDV
26VIP Development – HDMIDV
Please note, although thesis are created in collaboration with professors, you need to get final approval by your UNI professor.